|  |
| 个人简介 |  |
| 学习经历： 2006 - 2010，浙江大学，电子信息技术及仪器专业，学士 2010 - 2012，瑞典皇家理工学院，片上系统设计专业，硕士 2012 - 2016，新加坡南洋理工大学，电气与电子工程专业， 博士 工作经历： 2016.4 - 2016.10， 新加坡南洋理工大学VIRTUS集成电路设计中心， 副研究员 2016.10 - 2017.2，新加坡南洋理工大学VIRTUS集成电路设计中心， 研究科学家 2017.2 - 至今， 上海科技大学信息科学与技术学院， 助理教授、研究员 |
| 主要研究内容 | |
| 娄鑫博士主要从事数字信号处理、数字滤波器电路与系统设计，有限域乘法电路设计以及超大规模数字集成电路设计相关的研究工作。 |
| 代表性论文 | |
| 1. X. Lou*, Y. J. Yu and P. K. Meher, “Fine-Grained Critical Path Analysis and Optimization for Area-Time Efficient Realization of Multiple Constant Multiplications”, IEEE Transactions on Circuits and Systems I, vol 62, no. 3, pp. 863-872, Mar. 2015. 2. X. Lou*, Y. J. Yu and P. K. Meher, “New Approach to the Reduction of Sign-extension Overhead for Efficient Implementation of Multiple Constant Multiplications”, IEEE Transactions on Circuits and Systems I, vol 62, no. 11, pp. 2695-2705, Nov. 2015. 3. X. Lou*, Y. J. Yu and P. K. Meher, “Analysis and Optimization of Product-Accumulation Section for Efficient Implementation of FIR Filters”, IEEE Transactions on Circuits and Systems I, vol 63, no. 10, pp. 1701-1713, Oct. 2016. 4. X. Lou*, Y. J. Yu and P. K. Meher, “Lower Bound Analysis and Perturbation of Critical Path for Area-Time Efficient Multiple Constant Multiplications”, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol 36, no. 2, pp. 313-324, Feb. 2017. 5. P. K. Meher, and X. Lou*, “Low-Latency, Low-Area, and Scalable Systolic-Like Modular Multipliers for GF(2^m) Based on Irreducible All-One Polynomials”, IEEE Transactions on Circuits and Systems I, vol 64, no. 2, pp. 313-324, Feb. 2017. 6. X. Lou*, P. K. Meher, Y. J. Yu and W. B. Ye, “Novel Structure for Area-Energy-Efficient Implementation of FIR Filter”, IEEE Transactions on Circuits and Systems II, in press. |
